SWI 02h (GBA) or SWI 06h (NDS7/NDS9) - Halt
Halts the CPU until an interrupt request occurs. The CPU is switched into
low-power mode, all other circuits (video, sound, timers, serial, keypad,
system clock) are kept operating.
Halt mode is terminated when any enabled interrupts are requested, that is
when (IE AND IF) is not zero, the GBA locks up if that condition doesn't
get true. However, the state of CPUs IRQ disable bit in CPSR register, and
the IME register are don't care, Halt passes through even if either one
has disabled interrupts.
On GBA and NDS7, Halt is implemented by writing to HALTCNT, Port 4000301h. On
NDS9, Halt is implemted by writing to System Control Coprocessor (mov
p15,0,c7,c0,4,r0 opcode), this opcode hangs if IME=0.
No parameters, no return value.
(GBA/NDS7: all registers unchanged, NDS9: R0 destroyed)
SWI 07h (NDS7) - Sleep
No info, probably similar as GBA SWI 03h (Stop). Sleep is implemented for
NDS7 only, not for NDS9, not sure if the functions stops BOTH NDS7 and NDS9?
